1) Field of the Invention
The present invention relates to a semiconductor integrated circuit that inputs a signal produced by a magneto-resistance (MR) head to a circuit provided at the next stage.
2) Description of the Related Art
Conventionally, a signal that is read from a magnetic recording medium using a magneto-resistive (MR) head is input into a read amplifier circuit. A constant current (current bias) is applied to the MR head and the change in voltage due to the change in the resistance is measured. For the sake of explanation this method will be termed as voltage sensing method.
The MR elements are the electronic components that display the MR effect. The MR effect implies that the electrical resistance changes when the material is magnetized and the resistance goes back to the original value when the magnetic field is turned off. The MR elements include a giant magneto-resistive (GMR) element, a tunnel magneto-resistive (TMR) element, and the like.
FIG. 7 shows the configuration of a conventional circuit that employs the voltage sensing method. In FIG. 7, reference numeral 1 denotes an MR head and 2 denotes a read amplifier. The MR head has two terminals. A resistor R11 is connected to one terminal of the MR head 1. A resistor R12 is connected to the other terminal of the MR head 1. The resistors R11 and R12 are of equal resistance. The potential of a node c between the resistors R11 and R12 is made equal to a ground potential (GND) by an operational amplifier OP2. The MR head 1 reads data from a not shown magnetic disc. The MR head 1 frequently collides with the disk due to the vibration and the like. As a result of the collision excess current is generated causing the destruction of MR head 1.
A current source CS1 determines the amount of bias current Imr flowing to the MR head 1. The bias current Imr is determined based on a current Is and the resistance of resistors R9 and 10. The value of bias current Imr is obtained based on the equation:Imr=RR9/RR10×Is,  (1)where RR9 and RR10 are the resistances of the resistors R9 and R10 respectively and Is is the current that flows from a positive power supply voltage Vcc to the current source CS1 through the resistor R9.
Resistors R5 and R6 are connected to each other to avoid the influence of the parasitic capacitance of an NMOS transistor NM1 and a PMOS transistor PM1. Capacitors C1 to C3 are provided to eliminate noise caused by the bias current Imr. A voltage vin is calculated based on the equation:vin=Imr×rmr, (2)where rmr is the resistance of MR head 1.
The advantages of the conventional circuit are that it has a high frequency range and a fast switching rate of bias current Imr. Nevertheless, the conventional circuit is a high impedance circuit as it carries a constant current to the MR head. Hence the desired amount of current Imr for MR head 1 is not generated due to parasitic inductance, parasitic resistance, and parasitic conductance. The parasitic inductance, parasitic resistance, and parasitic conductance are generated by a wire that connects the MR head to the integrated circuit (IC). The conventional circuit also has a problem of noise entering the circuit. The noise enters-the circuit from another circuit like a write current driver. The write current driver operates at a high speed in the IC.